Field of the Invention
The present invention relates to a power semiconductor device and, more particularly, to an IGBT (Insulated Gate Bipolar Transistor) having a high breakdown voltage of 1,200 V or more.
Description of the Related Art
A conventional IGBT has a sectional structure as shown in FIG. 6, and its basic operation is described in Published Unexamined Japanese Patent Application No. 57-120369 in detail.
An N-channel IGBT formed in a silicon substrate will be described with reference to FIG. 6.
A semiconductor substrate 1 consists of a P.sup.+ -type anode layer 11 having a thickness of about 150 .mu.m and an impurity concentration of about 10.sup.20 /cm.sup.3, and an N.sup.- -type drain layer 12 formed on a first major surface of the anode layer 11. The N.sup.- -type drain layer 12 includes a pair of P-type base regions 13 in which an annular N.sup.+ -type source region 14 is provided. A polysilicon gate electrode 16 is provided on the substrate surface through a thin oxide film 15. A source electrode 17 is provided to short-circuit the source and base regions 14 and 13. A gate electrode 18 is provided on the polysilicon gate electrode 16, and an anode electrode 19 is formed on the lower surface of the P.sup.+ -type anode layer 11.
In the IGBT having this structure, when the gate electrode 16 is kept at a negative potential while grounding the source electrode 17 and applying a positive voltage to the anode electrode 19, the IGBT assumes an off-state. When a positive potential is applied to the gate electrode 16, an inversion channel layer is produced in the surface layer of the P-type base region 13, as in other conventional IGBTs. Therefore, electrons flow from the source region 14 into the surface layer of the drain layer 12 through the inversion channel layer to provide an electron accumulation layer. The electrons are further moved toward the anode electrode 19 through the drain layer 12 by the voltage applied between the source and the anode, thereby providing a forward-biased condition between the P.sup.+ -type anode layer 11 and the N.sup.- -type drain layer 12. Holes are then injected from the P.sup.+ -type anode layer 11 to the N.sup.- -type drain layer 12 to modulate the conductivity of the N.sup.- -type drain layer 12 and to turn on the IGBT. In this state, when the gate electrode 18 is returned to zero or negative potential, the channel is closed and the off-state is again obtained.
In the IGBT, however, a part of the minority carriers (holes) injected from the anode layer 11 to the drain layer 12 are undesirably accumulated in the drain layer 12 as excessive minority carriers. Accordingly, in order to turn off the IGBT, even if the gate voltage is set to zero to close the channel, thus stopping the flow of the electrons, the IGBT is not turned off until the accumulated minority carrier are removed from the drain layer 12. Furthermore, in this IGBT, when the electrons present in the drain layer 12 pass through the anode layer 11 during the turn-off operation, a new hole injection is induced from the anode layer 12 to increase the turn-off time. As a result, the current flowing through the IGBT is increased by about 10 times that of a conventional vertical MOSFET. However, the turn-off time is increased to about 10 times or more. In the case where such an IGBT is applied to switching devices, e.g., an inverter, its application is quite limited because a long turn-off time prevents an increase in the switching frequency.
For improving the turn-off time of the IGBT, it has been known to reduce the carrier life time. The carrier life time can be reduced by diffusing a heavy metal, e.g., Au, Pt, etc., into a desired semiconductor region, or by applying a radiation, e.g., a neutron beam, a gamma-ray, an electron beam, etc., thereto. In this case, however, although the turn-off time is improved, the degree of the conductivity modulation is degraded, so that the low on-resistance characteristic that is the greatest advantage of the IGBT is deteriorated. It may be also considered to decrease the impurity concentration of the P.sup.+ -type anode layer 11 in order to suppress the hole injection from the anode. When, however, the impurity concentration of the P.sup.+ -type anode layer 11 is decreased, the contact resistance with the metal electrode is increased to increase the on-resistance of the device. When the high breakdown voltage of 1,200 V or more is required for the IGBT, it is necessary that the N.sup.` -type drain layer has a very low impurity concentration of about 5.times.10.sup.13 /cm.sup.3 and a thickness of 100 .mu.m or more. However, it is difficult to stably provide such a drain layer according to present epitaxial growth techniques. Published Unexamined Japanese Patent Application No. 2-7569 discloses that a double diffusion type DMOS structure is provided in one surface of a lightly doped N.sup.- -type semiconductor substrate and that a P.sup.+ -type anode layer is formed in the other surface by ion implantation techniques. However, since the P.sup.+ -type anode layer has a very shallow junction depth of about 1 .mu.m, the structure can be easily influenced by the surface state, and stable characteristics cannot be obtained.